DVCC and battery cell voltage balancing - 16S Sunwoda batteries not achieving balance

DIY
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I spent some time monitoring the network. It connects to fuda-solar-dc.vidagrid.com then sends TLS encrypted packets to 3.77.100.41:22017 including an initial ~920 byte burst, then 30 second heartbeats of ~86 bytes.

I still didn’t hear back from the installer or battery provider but it seems the battery provider created a case with Sunwoda (or whatever provider they used) themselves.

I’m honestly surprised this thing uses encrypted connections for the communications. On the one hand I’m happy about them doing this but on the other hand sad as I can’t see what it sends.

I kept my CAN frames capturing/analysis pipeline running and can confirm the SAT/remote service didn’t use the device to change any of the BMS settings btw. To me the culprit seems to be the cell OVP setting, which is just 3.450V (too low) resulting in modules stopping charging and going idle as soon as their highest cell reaches such voltage.

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I shared my analysis with my installer and they confirmed they’d relay it to the SAT but who knows.

If only they shared a firmware copy with me I bet I’d be able to resolve this faster than them :laughing:.

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This topic should be 'Pinned, (if possible) :pushpin: …high IQ topic :graduation_cap:

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Finally I have an update to share here. cc @lxonline @MSl1 @nickdb .

Sunwoda monitored the data for some weeks and yesterday they pushed an update to the firmware:

  • All 5 modules went from FW 277 → 286
  • System FW went from 5377 → 7681

They had observed modules 1/5 and 2/5 had some issues charging as per their communications with my installer.

I do not see changes to any of the parameters announced by the BMS in its CAN frames other than CVL, which is now dynamically adjusted by the BMS during the absortion window in an active manner. More details on this below.

Today I completed a charge cycle. Some observations are below:

  • 13:30 - Bulk, SOC=95%, CVL=55.0V, Δ=14mV. New firmware ramping CVL up with SOC (vs old fixed 54.7V).
  • 13:37 - CVL peaks at 55.2V during Bulk. Never seen before.
  • 13:44 - State flips to Absorption at SOC=98%, CVL=54.9V, max_cell=3404mV. Δ=15mV.
  • 13:44 to 13:55 - First 10 min of Absorption: current oscillates 19–63A, CVL bounces 54.6<->55.0V. Δ grows 15->24mV. Cells climbing slowly.
  • 13:59 to 14:03 - Recovery push: CVL climbs 54.8->55.2V (record), max_cell->3452mV.
  • 14:04 - SOC reaches 100%.
  • 14:07 to 14:09 - Peak of the session: CVL=55.2V, max_cell=3493mV (record), Δ=104mV (record peak). Current still positive at 14A.
  • 14:10 - Current flips negative (-0.7A). Passive balancers engage (pure guess on my end). Pack stops accepting charge.
  • 14:10 to 14:25 - First 15 min of balancing? CVL steps down 54.7->54.3V, max_cell drops 3474->3444 (-30mV), Δ drops 93->87mV. Fast initial phase.
  • 14:30 to 14:55 - CVL holds 54.2->54.1V, max_cell drains 3440->3424 (-16mV), Δ drops 87->78mV.
  • 15:00 to 15:23 (now) - Steady state: CVL=54.0->53.9V, V=54.0V, I=-0.3A, max_cell=3413mV, Δ=71mV
  • 15:35 - Δ=67mV, pack voltage = 54.0V

Graphic of voltage deltas for the past 7 days (only the days I ran the measuring tooling I wrote).

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Zoom on today’s data, showing what I want to think is the passive balancers triggering. This is after the absortion window ended.

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Update as of 16:45.

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Update (17:30) - it seems to be doing a 2nd round of balancing, all triggered by the system on its own. At 17:06: max_cell = 3379 mV, Δ = 45m so all cells were well below the 3.40V balancer activation threshold. It charged until a cell reached 3.45V and then started discharging slowly (via the passive balancers I guess) again.

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My understanding of the situation is that with the new firmware CVL climbs to 55.2V to deliberately push high cells into the balancer activation band (3.40-3.45V), then tracks down as cells naturally relax. It also lets the pack go into mild discharge (-0.7A balancer current). With the old firmware it backed off CVL immediately on any cell stress. System Δ reduced 33mV (104 → 71mV) in ~75 min, however the pack total voltage is lower today than before. Should I expect this value to grow as the passive balancers work during the following weeks/months? :thinking:

I’ll keep posting progress updates here if that’s okay with the Victron staff. If anything, this could be useful to the next person that faces a similar issue, even if with a different provider. I want to think this will slowly improve the imbalance although I’m well aware the passive balancers might take months for it.

As a side note they pushed this update around 19:28 Spain time, when there was still plenty of sun. This resulted in Victron raising 2 alarms:

  • BMS lost: Alarm → this happened due to the battery pack rebooting to apply the uopdate
  • Low battery: Alarm → this happened once the first few modules rebooted while Victron still was configured with a 500Ah capacity

I wish they had informed me about this beforehand so I could stop the FV inverter and set Charge and Discharge current limits to 0A to ensure nothing bad happened but I guess that’s too much asking for a multi-billion dollar company? :sweat_smile: Luckily both alarms disappeared shortly after (~4 minutes) once these rebooted.

:saluting_face: Best regards

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Appreciate the update. It was certainly an interesting read. And good to know there is manufacture support and response.

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Hello Miguel!

The new firmwares reduces the maximum cell voltage difference from ~130mV to ~80mV. This is a good value I think. Your Sunwoda battery stack is running fine with the current firmware.

For comparison here is another graph log from my Pytes battery stack over the last full charge cycle.

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As you can see the high voltage differences occurs only if the the cells are pushed to the highest voltages, SOC > 98% or in the case of high discharge currents (high loads in my system). But below the SOC of 98% or after a short time after a high load the BMS balance the batteries to cell voltage differences about 3 mV.

Higher cell voltage differences about 50-100mV in SOC near 100% or at high discharge currents are normal.

Best regards, Mario :+1:

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Short update: it seems to attempt more balancing cycles per day but no meaningful improvements. To me it seems the passive balancer is just too soft for it to happen. It lacks the capacity to correct the intra-module asymmetry we have. Effective bleed per pulse ~50mV, and the pack re-imbalances by the same amount in the next cycle. The below graph shows the difference in behavior before and after the firmware update.

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I’ll keep monitoring but I believe there’s not much I can do at this point. I tried limiting charging upon the max cell reaching 3.370V to 10A (2A per module) but it had made no difference at all. Ignore the graph descriptions above, these are outdated from prior months researching this. Data in the graphs is accurate.

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Thats the fact. :wink:

The Sunwoda BMS has its own balanacing algorithm. You cannot re-program this algorithm. The onliest way to change something is to limit the maximum charge voltage, this means you never reach the SOC100 with the stack. But, i would not make this. Let the Sunwoda BMS make his job and all is fine.

You must limit the voltage not the current to stop charging, but I would not make this.

Some month ago in the Pytes forum a user was afraid about his cell voltage difference of 80 mV. The support engineer answered 80 mV is a very good value. :grinning_face:

So, let the Sunwoda stack run!

Best regards

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80 mv good?! right now “my” batteries are at 99% soc and have only 2mv difference for both batteries, when new they were over 150mv.

Btw, isn’t possible to ad an separate balancer into each battery? some have high balance current.

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You have two batteries with very similar cells, same production time, same materials… i think.

My stack has also 2-3 mV at SOC 98, at SOC 100 the cell diff. rises up to ~30mV. All is fine. :+1:

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Addendum: The battery voltages of every battery within the stack is the most important parameter, not the max. cell voltage difference. :wink: